fdr8305n fdr8305n rev. c fdr8305n dual n-channel 2.5v specified powertrench ? ? ? ? ? mosfet general description these n-channel 2.5v specified mosfets are produced using fairchild semiconductor's advanced powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. applications ? load switch motor driving power management november 1999 features 4.5 a, 20 v. r ds(on) = 0.022 ? @ v gs = 4.5 v r ds(on) = 0.028 ? @ v gs = 2.5 v. low gate charge (16.2nc typical). fast switching speed. high performance trench technology for extremely low r ds(on) . small footprint (38% smaller than a standard so-8);low profile package (1 mm thick); power handling capability similar to so-8. ? 1999 fairchild semiconductor corporation absolute maximum ratings t a = 25 c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 20 v v gss gate-source voltage 8 v i d drain current - continuous (note 1a) 4.5 a - pulsed 20 p d power dissipation for single operation (note 1a) 0.8 w t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 156 c/w r jc thermal resistance, junction-to-case (note 1) 40 c/w package marking and ordering information device marking device reel size tape width quantity .8305 fdr8305n 13 ?? 12mm 3000 units d1 d2 d2 d1 g1 g2 s1 s2 supersot -8 tm 1 5 7 8 6 4 3 2
fdr8305n fdr8305n rev. c electrical characteristics t a = 25 c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a 20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 14 mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 a i gssf gate-body leakage current, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate-body leakage current, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 0.4 0.85 1.5 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -3 mv/ c r ds(on) static drain-source on-resistance v gs = 4.5 v, i d = 4.5 a v gs =4.5 v, i d =4.5 a, t j =125 c v gs = 2.5 v, i d = 4 a 0.015 0.026 0.020 0.022 0.040 0.028 ? i d(on) on-state drain current v gs = 4.5 v, v ds = 5 v 10 a g fs forward transconductance v ds = 4.5 v, i d = 4.5 a 24 s dynamic characteristics c iss input capacitance 1600 pf c oss output capacitance 380 pf c rss reverse transfer capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 200 pf switching characteristics (note 2) t d(on) turn-on delay time 12 22 ns t r turn-on rise time 15 27 ns t d(off) turn-off delay time 35 55 ns t f turn-off fall time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 ? 18 30 ns q g total gate charge 16.2 23 nc q gs gate-source charge 2.5 nc q gd gate-drain charge v ds = 10 v, i d = 4.5 a, v gs = 4.5 v 5.5 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 0.67 a v sd drain-source diode forward volta g ev gs = 0 v, i s = 0.67 a (note 2) 0.65 1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user ? s board design. both devices are assumed to be operating and sharing the dissipated heat energy equally. 156 o c/w on a minimum mounting pad of 2oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300s, duty cycle < 2.0%.
fdr8305n fdr8305n rev. c typical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0.8 1 1.2 1.4 1.6 1.8 0 4 8 12 16 20 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 2.0v 2.5v 4.0v 3.5v 4.5v 3.0v 0 0.01 0.02 0.03 0.04 0.05 0.06 12345 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 2.3a t a = 125 o c t a = 25 o c 0 4 8 12 16 20 0.5 1 1.5 2 2.5 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 4.5a v gs = 4.5v 0 4 8 12 16 20 0 0.4 0.8 1.2 1.6 2 v ds , drain to source voltage (v) i d , drain current (a) v gs = 4.5v 3.0v 2.5v 2.0v 1.5v
fdr8305n fdr8305n rev. c typical characteristics (continued) figure 7. gate charge characteristics. figure 8. capacitance characteristics. figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0 500 1000 1500 2000 2500 0 4 8 12 16 20 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v 0 1 2 3 4 5 0 4 8 12 16 20 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 4.5a v ds = 5v 10v 15v 0 10 20 30 40 50 0.0001 0.001 0.01 0.1 1 10 100 1000 single pulse time (sec) power (w) single pulse r ja =156 o c/w t a =25 o c 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance 1 sin g le pulse 0.05 0.02 0.2 r(t), normalized effective d = 0.5 0.1 0.01 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 156 c/w ja ja ja t - t = p * r (t) ja a j p(pk) t 1 t 2 2 ja a j p(pk) t 1 t 2 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) r ds(on) limit dc 10s 1s 100ms 10ms 1ms 100 s v gs = 4.5 v single pulse r ja =156 o c/w t a =25 o c
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